Fundamental Information Technology Engineer Examination (FE) | Subject A Computer Architecture, OS, and Reliability Questions 01

The total is 600 million × 1.5 = 900 million clock cycles. A 3 GHz clock supplies 3 billion cycles per second, so the execution time is 900 million ÷ 3 billion = 0.3 seconds. The 0.2-second result omits CPI and divides only the instruction count by the clock frequency.

The first instruction needs five cycles to pass through all stages, after which one instruction completes per cycle. The total is therefore 5 + (100 − 1) = 104 cycles. The 500-cycle result multiplies 5 × 100 and ignores overlap between pipeline stages.

One GiB is 1,024 × 2^20 bytes, or 8,192 × 2^20 bits. Each chip holds 256 × 2^20 bits, so 8,192 ÷ 256 = 32 chips are required. The answer 8 incorrectly treats bits and bytes as the same unit.

Updating both cache and main memory on each write is the write-through policy. It makes their contents easier to keep consistent but increases main-memory writes. A policy that updates main memory when a modified cache line is evicted is write-back.

RAID 5 uses capacity equivalent to one disk for distributed parity, so usable capacity is 2 TB × (4 − 1) = 6 TB. It can reconstruct data after one disk failure, but not after two simultaneous failures. RAID does not replace an independent backup for accidental deletion and similar events.

Availability is MTBF ÷ (MTBF + MTTR), so 990 ÷ (990 + 10) = 0.99. A result of 1.00 ignores the ten hours needed for repair. The value 0.01 is the proportion of downtime.

Fail-safe design moves a system to a state that minimizes danger when a failure occurs, giving safety priority over normal operation. Foolproof design aims to prevent user error, while fail-soft design continues processing with reduced function or performance after a fault.

A runs for 2 and returns to the tail with 1 remaining; B runs for 2 and returns with 2 remaining. C then runs for 1 and finishes, followed by A's final 1 and B's final 2. The completion order is therefore C → A → B. Round robin does not let the first task retain the CPU until completion.

After pages 1, 2, and 3 are loaded, page 1 is referenced again. Page 2 is therefore the one whose most recent use is oldest. LRU replaces page 2 with page 4. Automatically choosing page 1 merely because it was loaded first follows FIFO reasoning instead.

The task cannot continue until the disk read completes, so it moves from running to waiting. When I/O completes, it moves to ready and waits for CPU dispatch. Completion of I/O does not necessarily move it directly into the running state.